In the field of data processing systems, access to data stored within data storage devices such as flash memory arrays may be provided via an interface unit or the like. Such an interface unit is typically operably coupled to one or more data storage devices such as, flash arrays to enable access to data stored therein, and to a system interconnect such as, a system bus or crossbar switch for receiving data access requests from one or more master devices. Typically, such an interface unit further comprises a plurality of buffers, and may be arranged to perform prefetching of data in order to reduce the latency in accessing data stored within the data storage device(s) operably coupled thereto. When all of the interface unit buffers are filled with previously fetched data, it is necessary to replace data that is currently held within one or more of the buffers with newly fetched data. For example, the interface unit may be arranged to implement a replacement algorithm such as, a least recently used (LRU) or most recently used (MRU) algorithm, in order to determine which buffer's content is to be replaced with the newly fetched data. The implementation of such a replacement algorithm can significantly affect on the effectiveness of the prefetching performed by the interface unit.
Modern data processing systems often comprise a plurality of master devices requiring access to data stored within data storage devices. Accordingly, interface units for such data storage devices are often required to provide access to such data by multiple master devices, and in particular are required to perform prefetching of data in such a manner as to accommodate multiple master devices. A problem with conventional interface units performing prefetching of data for multiple master devices is that data accesses for the multiple master devices, and thus the prefetches therefor, compete for buffer space within the interface unit. Accordingly, prefetched data for one master device may overwrite data within a buffer of the interface unit previously fetched for another master device. Such buffer conflicts significantly reduce the effectiveness of the prefetching performed by the interface unit, and thus are detrimental to performance within multiple master processing systems.
One solution for reducing, or even avoiding, such buffer conflicts within multi-master data processing systems is to increase the number of interface units via which master devices are able to access data stored within a data storage unit; and to assign specific interface units to specific master devices. In this manner, the number of master devices that an interface unit is required to serve (i.e. provide access to data stored within the data storage device) may be reduced, and thus the problem of buffer conflicts may be reduced. However, increasing the number of interface units directly increases the required die size for the data processing systems, as well as increasing the number of system interconnect ports required for supporting the increased number of interface units, further increasing the required die size.